Thesis

Editted Book

    1. B. Ors, B. Preneel, “Cryptography and Information Security in the Balkans”, Proceedings of the first International Conference, BalkanCryptSec 2014, Istanbul, Turkey, October 16-17, 2014, Revised Selected Papers, Lecture Notes in Computer Science, Springer, 9024, 2015.
    2. B. Ors, “Radio Frequency Identification: Security and Privacy Issues”, Proceedings of the 6th International Conference on RFID Security, Lecture Notes in Computer Science, Springer Berlin/Heidelberg, 6370 September 2010.
    3. A. Elci, B. Ors, B. Preneel, “Security of Information and Networks”, Trafford Publishing, Canada. 2008. ISBN: 978-1-4251-4109-7.

Book Chapters

    1. B. Ors, B. Preneel, I. Verbauwhede, “Side-Channel Analysis Attacks on Hardware Implementations of Cryptographic Algorithms”, Chapter in Wireless Security and Cryptography: Specifications and Implementations, by N. Sklavos (Editor), X. Zhang (Editor), March 30, 2007, CRC Press.
    2. B. Ors, F. Gurkaynak, E. Oswald, and B. Preneel, “Power-Analysis Attack on an ASIC AES implementation”, Chapter in Embedded Cryptographic Hardware:Design and Security, Nova Science Publishers, 8 pages, 2004.

Journal Papers

    1. L. Akcay, B. Ors, “Lightweight ASIP Design for Lattice-Based Post-quantum Cryptography Algorithms”, Arabian Journal for Science and Engineering, March 2024, DOI: 10.1007/s13369-024-08976-w
    2. O. Ozkaya, B. Ors, “Model-based, fully simulated, system-level power consumption estimation of IoT devices”, Microprocessors and Microsystems, Volume 105, March 2024, DOI: j.micpro.2024.105009
    3. N. Hematpour, F. Gharari, B. Ors, M. E. Yalcin, , “A novel S-box design based on quantum tent maps and fractional stochastic models with an application in image encryption”, Soft Computing, 2023, 10.1007/s00500-023-09478-x
    4. M. Kian, E. Gholizadehazari, M. Mousazadeh, B. Ors, “Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection”, IEEE Access, Volume 10, pages 58151-58162, 2022, 10.1109/ACCESS.2022.3177743
    5. E. Akalp Kuzu, A. Tangel, B. Ors, “Frequency Domain Horizontal Cross Correlation Analysis of RSA”, Advances in Electrical and Computer Engineering, Volume 22, Issue 2, pages 3-10, 2022, 10.4316/AECE.2022.02001
    6. L. Akcay, B. Ors, “Potential advantages of transport triggered architecture for lattice-based cryptography”, the International Journal of Embedded Systems, 2022
    7. I. Yavuz, B. Ors, “End-to-End Secure IoT Node Provisioning”, Journal of Communications vol. 16, no. 8, pp. 341-346, August 2021, Doi: 10.12720/jcm.16.8.341-346
    8. L. Akcay, B. Ors, “Comparison of RISC-V and transport triggered architectures for a post-quantum cryptography application”, Turkish Journal of Electrical Engineering & Computer Sciences, 2021, https://doi.org/10.3906/elk-2003-27
    9. A. Seker, B. Ors, “Instruction Set Extension Of NIOS II for Floating -Point HOG Description and Implementation on an FPGA”, Journal of Mechanics of Continua and Mathematical Sciences, Special Issue No. 6, January, 2020, https://doi.org/10.26782/jmcms.spl.6/2020.01.00003
    10. A. Aris, B. Ors, F. Oktug, “New Lightweight mitigation techniques for RPL version number attacks”, Elsevier Ad Hoc Networks, Volume 85, 2019, Pages 81 - 91, https://www.sciencedirect.com/science/article/pii/S1570870518307625?via%3Dihub
    11. M. Tukel, A. Yurdakul, B. Ors, “Customizable embedded processor array for multimedia applications”, Integration, the VLSI Journal, Volume 60, January 2018, Pages 213-223, https://doi.org/10.1016/j.vlsi.2017.09.009
    12. Gokceli, N. Zhmurov, G. Karabulut Kurt, and B. Ors, “IoT in Action: Design and Implementation of a Building Evacuation Service”, Journal of Computer Networks and Communications, Volume 2017, Article ID 8595404, 13 pages https://doi.org/10.1155/2017/8595404
    13. A. Dogan, B. Ors, G. Saldamli, “Analyzing and comparing the AES architectures for their power consumption”, Journal of Intelligent Manufacturing, April 2014, Volume 25, Issue 2, pp 263-271.
    14. Z. Tariguliyev, B. Ors, “Reliability and security of arbiter-based physical unclonable function circuits”, International Journal of Communication Systems, Special Issue: Special Issue on Advanced Processing Technologies and Applications for Mobile Communication Systems, Volume 26, Issue 6, pages 757 - 769, June 2013.
    15. G. Avoine, M. A. Bingol, X. Carpent, B. Ors, “Privacy-friendly Authentication in RFID Systems: On Sub-linear Protocols based on Symmetric-key Cryptography”, IEEE Transactions on Mobile Computing, volume: 12, issue: 10, DOI: 10.1109/TMC.2012.174, 2013, pages: 2037 - 2049.
    16. K. Alptekin Bayam, S.B. Ors, “Differential Power Analysis Resistant Hardware Implementation of the RSA Cryptosystem”, The Turkish Journal of Electrical Engineering & Computer Sciences, Vol.18, No.1, 2010, pages 129-140.
    17. B. Ors, L. Batina, B. Preneel, J. Vandewalle, “Hardware implementation of an Elliptic Curve Processor over GF(p) with Montgomery Modular Multiplier”, Int. J. Embedded Systems, Vol. 3, No. 4, 2008.
    18. E. De Mulder, B. Ors, B. Preneel and I. Verbauwhede, “Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems”, Elsevier An International Journal Computers and Electrical Engineering, 33 (5), p.367-382, Sep 2007.
    19. N. Mentens, B. Ors, B. Preneel, and J. Vandewalle, “An FPGA Implementation of a Montgomery multiplier over GF (2^m)”, Computing and Informatics, vol: 23, issue: 5-6, pp. 487-499, 2004.
    20. L. Batina, P. Buysschaert, E. De Mulder, N. Mentens, B. Preneel,G. Vandenbosch, I. Verbauwhede, B. Ors, “Side channelattacks and fault attacks on cryptographic algorithms”, Revue HFTijdschrift 2004, vol. 4, pp. 36-45, 2004.
    21. L. Batina, B. Ors, B. Preneel, J. Vandewalle, “Hardware Architectures for Public Key Cryptography”, Elsevier Science Integration, the VLSI Journal, issue 34, pages 1-64, 2003.

International Conference Papers

    1. A. Celik, F. Yilmaz, M. A. Korkmaz, B. Ors, “Implementation of CRYSTALS-Kyber Post- Quantum Algorithm Using RISC-V Processor”, 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2023.
    2. C. I. Rumelili Koksal, N. M. Cicek, A. Yilmazer Metin, B. Ors, “Lookupx: Next-Generation Quantization and Lookup Techniques for Empowering Performance and Energy Efficiency”, 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2023.
    3. C. I. Rumelili Koksal, N. M. Cicek, A. Yilmazer Metin, B. Ors, “Optimizing Data Availability and Utilization in Deep Learning Accelerator SoCs”, 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2023.
    4. A. B. Ordu, B. Ors, “RPL Authenticated Mode Evaluation: Authenticated Key Exchange and Network Behavioral”, Thirteenth International Conference on Ubiquitous and Future Networks (ICUFN), 2022.
    5. M. Uzuner, I. Hokelek, B. rs, “A Model Based Hardware Implementation of Traffic Regulator in ARINC-664 End System”, 12th International Conference on Electrical and Electronics Engineering, ELECO 2021.
    6. M. Ordubag, B. Ors, “Model-Based Kalman Filter Design on an FPGA”, 12th International Conference on Electrical and Electronics Engineering, ELECO 2021.
    7. L. Akcay, B. Ors, “Custom TTA Operations for Accelerating Kyber Algorithm”, 12th International Conference on Electrical and Electronics Engineering, ELECO 2021.
    8. N. A. Koca, B. Yildiz, Y. C. Demirkol, B. Ors, “Multi-Layer Perceptron Hardware Accelerator on RISC-V Processor”, 12th International Conference on Electrical and Electronics Engineering, ELECO 2021.
    9. Y. Tozlu, Y. Yilmaz, B. Ors, “Design and Implementation Of a 32-Bit RISC-V Core”, 12th International Conference on Electrical and Electronics Engineering, ELECO 2021.
    10. O. Altinay, B. Ors, “Instruction Extension of RV32I and GCC Back End for Ascon Lightweight Cryptography Algorithm”, 2021 IEEE International Conference on Omni-Layer Intelligent Systems (COINS), DOI: 10.1109/COINS51742.2021.9524190
    11. O. Ozkaya, B. Ors, “System-Level, Model-Based Power Estimation of IoT Nodes”, IEEE World Forum on Internet of Things, 14 June-31 July 2021, New Orleans, LA, USA, DOI: 10.1109/WF-IoT51360.2021.9595622
    12. C. Topal, E. N. Isman, L. Akcay, B. Ors, “Instruction Extension of an Open Source RV32IMC Core for NTRU Cryptosystem”, 24th European Conference on Circuit Theory and Design (ECCTD), September 7-10, 2020, Sofia, Bulgaria.
    13. B. Bilgili, C. Yamaneren, K. Vatansever, U. Coltu, B. Ors, “System on Chip Design with Vivado High-Level Synthesis Tool”, 11th International Conference on Electrical and Electronics Engineering, ELECO 2019.
    14. M. O. Demirturk, B. Ors , “Low Energy Consuming SoC Design for IoT Applications ”, 11th International Conference on Electrical and Electronics Engineering, ELECO 2019.
    15. E. Hatun, G. Kaya, E. Buyukkaya, B. Ors, “Side Channel Analysis Using EM Radiation of RSA Algorithm Implemented on Raspberry Pi”, International Symposium on Networks, Computers and Communications (ISNCC), 2019.
    16. Buyukcolak, B. Ors, “Simultaneous Image Encryption and Compression Using Modified Huffman Tables”, 7th International Conference on Digital Information Processing and Communications (ICDIPC), 2019.
    17. F. Kula, B. Ors, “Average Power Consumption Estimation and Momentary Power Consumption Profile Generation of a Softcore Processor”, 7th International Conference on Digital Information Processing and Communications (ICDIPC), 2019.
    18. L. Akcay, M. Tukel, B. Ors, “Design and implementation of an OpenRISC system-on-chip with an encryption peripheral”, European Conference on Circuit Theory and Design, ECCTD 2017.
    19. M. Tukel, A. Yurdakul, B. Ors, “A novel template-based multimedia processor array and its toolset”, 10th International Conference on Electrical and Electronics Engineering, ELECO 2017.
    20. B. Acar, B. Ors, “Hardware/software co-design of a lightweight crypto algorithm BORON on an FPGA”, 10th International Conference on Electrical and Electronics Engineering, ELECO 2017.
    21. Aygun,L. Kouhalvandi, B. Ors, E. O. Gunes, “Karatsuba Ofman Multiplication implementation on SystemC for Diffie-Hellman Key Exchange algorithm”, IEEE 4th International Conference on Knowledge-Based Engineering and Innovation, KBEI 2017.
    22. Gokceli, G. Karabulut Kurt, B. Ors, “Backhaul Infrastructures in Building Automation Systems: Wired or Wireless?”, The 3rd IEEE IDAACS Symposium on Wireless Systems within the IEEE International Conferences on Intelligent Data Aquisition and Advanced Computing Systems: Technology and Applications, 26 - 27, September 2016, Offenburg, Germany.
    23. A. Aris, F. Oktug, B. Ors, “RPL version number attacks: In-depth study”, Proceedings of the NOMS 2016 IEEE/IFIP Network Operations and Management Symposium, Pages: 776 - 779.
    24. B. Ustaoglu, B. Ors, “Fault Tolerant Register File Design for MIPS AES-Crypto Microprocessor”, IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Cairo, Egypt, December 06-09, 2015.
    25. Gokceli, H.B. Tugrel, Pisirgen, G. Karabulut Kurt, B. Ors, “A Building Automation System Demonstration”, 9th International Conference on Electrical and Electronics Engineering (ELECO), 2015, Pages: 56 - 60.
    26. U. Esen, B. Ors, “Data Hiding Method Using Image Interpolation And Pixel Symmetry”, 9th International Conference on Electrical and Electronics Engineering (ELECO), 2015, Pages: 776 - 779.
    27. A.C. Bagbaba, B. Ors, “Hardware Implementation of Novel Image Compression-Encryption System on an FPGA”, 9th International Conference on Electrical and Electronics Engineering (ELECO), 2015, Pages: 1159 - 1163.
    28. O. Azbar, B. Ors, G. Karabulut Kurt, “ Implementation of Two Indoor Localization Algorithms on an FPGA”, 9th International Conference on Electrical and Electronics Engineering (ELECO), 2015, Pages 949-952.
    29. A.C. Bagbaba, B. Ustaoglu, I. Erdem, B. Ors, “ A Layered UVM Based Testbench Design for SpaceWire”, 9th International Conference on Electrical and Electronics Engineering (ELECO), 2015, Pages: 1164 - 1168.
    30. D. Engin, B. Ors, “ Implementation of Enigma Machine Using Verilog on an FPGA”, 9th International Conference on Electrical and Electronics Engineering (ELECO), 2015, Pages: 945 - 948.
    31. B. Ustaoglu, B. Ors, “Design and implementation of a custom verification environment for fault injection and analysis on an embedded microprocessor”, Third International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE), 2015, pages: 256 - 261, DOI: 10.1109/TAEECE.2015.7113636.
    32. M. A. Ozkan, B. Ors, “Data transmission via GSM voice channel for end to end security”, 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015, pp. 378-382.
    33. A. C. Bagbaba, B. Ors, “Implementation of a secure Near Field Communication system on a FPGA”, 8th International Conference on Electrical and Electronics Engineering (ELECO), 2013, DOI: 10.1109/ELECO.2013.6713921, pages: 621 - 625.
    34. A. Altintas, B. Ors, “System Level Design of Scalable Encryption Algorithm by Using CoWare ”, The International Conference on Computer, Information, and Telecommunication Systems, CITS 2013.
    35. H. Unlu, B. Ors, G. Saldamli, “A New Implementation Methodology for a Secure Distance Bounding Protocol ”, 7th International Conference on Electrical and Electronics Engineering, December 1-4, Bursa, Turkey, 2011.
    36. M. A. Ozkan, B. Ors, G. Saldamli, “Secure Voice Communication via GSM Network”, 7th International Conference on Electrical and Electronics Engineering, December 1-4, Bursa, Turkey, 2011.
    37. A. Aris, G. Saldamli, B. Ors, “Architectures for fast modular multiplication”, The 14th Euromicro Conference on Digital System Design (DSD) , Oulu, Finland, from August 31st to September 2nd, 2011.
    38. M. Oksar, B. Ors, G. Saldamli, “System Level Design of a Secure Healthcare Smart Card System”, IEEE Systems and Information Engineering Design Symposium, April 29, 2011, University of Virginia, Charlottesville, VA, USA, 2011.
    39. M. Soybali, B. Ors, G. Saldamli, “Implementation of a PUF Circuit on an FPGA”, the 4th IFIP International Conference on New Technologies Mobility and Security, 7 - 10 February 2011, Paris, France.
    40. D. Bayhan, B. Ors, G. Saldamli, “Analyzing and comparing the Montgomery multiplication algorithms for their power consumption”, the 6th IEEE International Conference on Computer Engineering and Systems (ICCES), Cairo, Egypt, 30 November - 2 December, pp. 257 - 261, 2010.
    41. V. Dalmisli, B. Ors, “Design Of New Tiny Circuits For AES Encryption Algorithm”, The 3rd International Conference on Signals, Circuits and Systems (SCS), November 6-8, 2009, Jerba, Tunisia.
    42. A. U. Danis, B. Ors, “Differential Power Analysis Attack Considering Decoupling Capacitance Effect”, The 19th European Conference on Circuit Theory and Design (ECCTD), August 23-27, 2009, Antalya, Turkey.
    43. A. C. Atici, L. Batina, J. Fan, I. Verbauwhede, and B. Ors, “Low-cost Implementations of NTRU for pervasive security”, In 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), IEEE, pp. 79-84, 2008.
    44. I. Yavuz, B. Ors, C. K. Koc, “FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m)”, International Conference on ReConFigurable Computing and FPGAs (ReConFig) , December 3-5, 2008, Cancun, Mexico .
    45. K. Alptekin Bayam, B. Ors, “Differential Power Analysis Resistant Hardware Implementation of The RSA Cryptosystem”, IEEE International Symposium on Circuits and Systems (ISCAS) , Sheraton Seattle Hotel, Seattle, Washington, USA, 2008.
    46. L. Ordu, B. Ors, “Power Analysis Resistant Hardware Implementations of AES”, The 14th IEEE International Conference on Electronics, Circuits and Systems, December 11-14, 2007, Marrakech, Morocco.
    47. K. Alptekin Bayam, B. Ors, B. Orencik, “A Hardware Implementation of RSA”, International Conference on Security of Information and Networks (SIN 2007), May 8-10, 2007, Salamis Bay Conti Resort Hotel, Gazimagusa (TRNC), North Cyprus.
    48. I. Yavuz, B. Ors, “Hardware Implementation of Elliptic Curve Cryptosystem over GF(p^m)”, International Conference on Security of Information and Networks (SIN 2007), May 8-10, 2007, Salamis Bay Conti Resort Hotel, Gazimagusa (TRNC), North Cyprus.
    49. E. De Mulder, B. Ors, B. Preneel and I. Verbauwhede, “Differential Electromagnetic Attack On An FPGA Implementation Of Elliptic Curve Cryptosystems”, Proceedings of the World Automation Congress, July 24-26, 2006, Budapest, Hungary
    50. E. De Mulder, P. Buysschaert, B. Ors, P. Delmotte, B. Preneel, G. Vandenbosch and I. Verbauwhede, “Electromagnetic analysis attack on a FPGA implementation of an elliptic curve cryptosystem”, Proceedings of the International Conference on "Computer as a tool (EUROCON), IEEE, November 21-24, 2005 (Second at IEEE Region 8 Student Paper Contest 2005).
    51. L. Batina, J. Lano, N. Mentens, B.Ors, B. Preneel, and I. Verbauwhede, ``Energy, Performance, Area versus Security Trade-offs for Stream Ciphers", In ECRYPT Workshop, SASC - TheState of the Art of Stream Ciphers, 9 pages, 2004.
    52. L. Batina, N. Mentens, B. Ors, B. Preneel, “Serial multiplier architectures over GF(2^n) for elliptic curve cryptosystems”, Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (MELECON), 2004, 12-15 May 2004, Vol.2, pp: 779 -782.
    53. F. Standaert, B. Ors, B. Preneel, and J. Quisquater, “Power Analysis Attacks against FPGA Implementations of the DES”, In Proceedings of Field-Programmable Logic and its Applications (FPL), Lecture Notes in Computer Science, Springer-Verlag, p. 84-94, 2004.
    54. L. Batina, G. Bruin-Muurling, B. Ors, “Flexible Hardware Designfor RSA and Elliptic Curve Cryptosystems”, Proceedings of Topics inCryptology - CT-RSA, The Cryptographers' Track at the RSA Conference,Tatsuaki Okamoto (Ed.), Lecture Notes in Computer Science 2964, pp. 250-263, San Francisco,CA, USA, February 23-27, 2004, Springer_verlag.
    55. F. Standaert, B. Ors, and B. Preneel, “Power Analysis attack on anFPGA implementation of AES”, In Proceedings of Cryptographic Hardwareand Embedded Systems - CHES, Marc Joye, Jean-Jacques Quisquater (Eds.),Lecture Notes in Computer Science (LNCS), Springer-Verlag, pp. 30-44, 2004.
    56. N. Mentens, B. Ors, B. Preneel, and J. Vandewalle, “An FPGAImplementation of a Montgomery multiplier over GF (2^m)”, The Proceedingsof the 7th IEEE Workshop on Design & Diagnostics of Electronic Circuits &Systems (DDECS), pp. 121-128, 2004.
    57. N. Mentens, B. Ors, and B. Preneel, “An FPGA Implementation of an EllipticCurve Processor over GF(2^m)”, In Proceedings of the 2004 Great Lakes Symposiumon VLSI (GLSVLSI 2004), pp. 454-457,2004.
    58. B. Ors, F. Gurkaynak, E. Oswald, and B. Preneel, “Power-Analysis Attack onan ASIC AES implementation”, In Proceedings of the International Conference on Information Technology (ITCC 2004), 8 pages, 2004.
    59. B. Ors, E. Oswald, B. Preneel, “Power-Analysis Attacks on an FPGA -- First Experimental Results”, The Proceedings of the 5th International Workshop on Cryptographic Hardware and Embedded Systems (CHES), C. Walter, C. K. Koc and C. Paar (Ed.), 2779 LNCS, pp. 35-50, Cologne, Germany, September 7 - 10 2003, Springer-Verlag.
    60. B. Ors, L. Batina, B. Preneel, J. Vandewalle, “Hardware Implementation of an Elliptic Curve Processor over GF(p)”, The Proceedings of the IEEE14th International Conference on Application-specific Systems, Architecturesand Processors (ASAP), pp. 433-443, The Hague, The Netherlands, June 24-26, 2003.
    61. B. Ors, L. Batina, B. Preneel, J. Vandewalle, “Hardware Implementationof a Montgomery Modular Multiplier in a Systolic Array”, The Proceedings of the 10th Reconfigurable Architectures Workshop (RAW), 8 pages, Nice, France,April 22, 2003.
    62. B. Ors, A. Dervisoglu, Writing VHDL Modelsof Parallel nxn Bit Multiplication Blocks , Proceedings of the European Conference on Circuit Theory and Design (ECCTD'99), pp 402-405, Aug. 1999,Stresa Italy.
    63. B. Ors, A. Dervisoglu, Modeling nxn MultiplicationBlocks for DSP Applications Using VHDL, Proceedings of the 25th EUROMICROConference, pp 892-895, Sept. 8-10 1999, Milan, Italy.

National Conference Papers

    1. Y. Adiguzel, B.Ors, “RISC-V Tabanli Kirmik Ustu Sistem icin Guvenli Onyukleme Tasarimi ve FPGA Uzerinde Gerceklenmesi”, 2024 32th Signal Processing and Communications Applications Conference (SIU).
    2. B.Ors, Z. Kucukkomeroglu, “Gorsel Kriptografi Semasinin Model Tabanli Tasarimi ve FPGA Uzerinde Uygulanmasi”, 2024 32th Signal Processing and Communications Applications Conference (SIU).
    3. H. Tas ve B. Ors, “QC-LDPC Kodlayicinin Model Tabanli Tasarim Yontemi ile Etkinlik Analizi”, Akilli Sistemlerde Yenilikler ve Uygulamalari (ASYU) Konferansi 7-9 Eylul, 2022, Antalya, Turkiye.
    4. B. Bilgili, B. Ors, A. E. Pusane, H. Ayar, “FPGA Uzerinde 5G Uyumlu Dusuk Yogunluklu Eslik Denetim Kod Cozucu Gerceklenmesi”, National Conference on Electrical, Electronics and Biomedical Engineering, ELECO 2022.
    5. C. Tatli, E. Denizeri, D. Kumlu, I. Erer, F. Isik, B. Ors, “FPGA Uzerinde Yere Nufuz Eden Radarlar icin Kargasa Giderme: Tasarim ve Gercekleme”, 2022 30th Signal Processing and Communications Applications Conference (SIU).
    6. T. Keles, B. Ors, “Yazılım Tanımlı ve Bilissel Radyonun Model Tabanlı Tasarımı ve FPGA Uzerinde Gerceklenmesi”, 2021 29th Signal Processing and Communications Applications Conference (SIU)
    7. E. Gholizadehazari, T. Ayhan, B. Ors, “An FPGA Implementation of a RISC-V Based SoC System for Image Processing Applications”, 2021 29th Signal Processing and Communications Applications Conference (SIU), DOI: 10.1109/SIU53274.2021.9477998
    8. M. O. Demirturk, L. Akcay, B. Ors, “Energy Efficient Sensor Design and Implementation on FPGA by Using Open Source Processors”, 27th Signal Processing and Communications Applications Conference (SIU), 2019.
    9. O. Ozkaya, B. Ors, “Model based node design methodology for secure IoT applications”, 26th Signal Processing and Communications Applications Conference (SIU), 2018, Pages: 1 - 4.
    10. A. Arslan, A. C. Bagbaba, B. Sen, B. Ors, “The Walsh-Hadamard transform based automated grading system for monitoring of heart murmurs”, National Conference on Electrical, Electronics and Biomedical Engineering, ELECO 2016.
    11. L. Akcay, B. Ors, M. Tukel, “Implementation of an OpenRISC Based SoC and Linux Kernel Installation on FPGA”, 24th Signal Processing and Communications Applications Conference (SIU), 2016, Pages: 1969 - 1972.
    12. B. Ustaoglu, I. Erdem, G. Isik, B. Ors, “Reliability Analysis of MIPS-32 Microprocessor Register Files Designed with Different Fault Tolerant Techniques”, 24th Signal Processing and Communications Applications Conference (SIU), 2016.
    13. B. Akmansayar, Kurtulan, B. Ors, “Design of core blocks and implementation on a programmable logic controller for a train signalization system”, 23th Signal Processing and Communications Applications Conference (SIU), 2015, pages: 1942 - 1945, DOI: 10.1109/SIU.2015.7130242.
    14. H. Postalli, Tuncay, B. Ors, “Implementation of a modem which transmits digital data on GSM voice channel”, 23th Signal Processing and Communications Applications Conference (SIU), 2015, pages: 2537 - 2540, DOI: 10.1109/SIU.2015.7130401.
    15. B. Ustaoglu, A.C. Bagbaba, B. Ors, I. Erdem, “Creating test environment with UVM for SPI”, 23th Signal Processing and Communications Applications Conference (SIU), 2015, pages: 2373 - 2376, DOI: 10.1109/SIU.2015.7130358.
    16. S.G. Baskir, B. Ors, “Hardware / software codesign and implementation for secure NFC applications”, 23th Signal Processing and Communications Applications Conference (SIU), 2015, pages: 2392 - 2395, DOI: 10.1109/SIU.2015.7130363.
    17. A.T. Erozan, A. Aydogdu, B. Ors, “Application specific processor design for DCT based applications”, 23th Signal Processing and Communications Applications Conference (SIU), 2015, pages: 2157 - 2160, DOI: 10.1109/SIU.2015.7130300.
    18. A.C. Bagbaba, B. Ors, O.Kayhan, A.T. Erozan, “JPEG image Encryption via TEA algorithm”, 23th Signal Processing and Communications Applications Conference (SIU), 2015, pages: 2090 - 2093, DOI: 10.1109/SIU.2015.7130282.
    19. B. Tas, B. Ors, G. Karabulut Kurt, “Bina Yonetim Sistemleri icin Tahliye Modeli”, Sinyal Isleme ve Iletisim Uygulamalari (SIU) Kurultayi, 16-19 Mayis 2015.
    20. A. Aris, F. Oktug, B. Ors, “Nesnelerin Interneti Guvenligi: Servis Engelleme Saldırıları”, Sinyal Isleme ve Iletisim Uygulamalari (SIU) Kurultayi, 16-19 Mayis 2015.
    21. A.C. Bagbaba, B. Ors, A.T. Erozan, “ Image filtering processor and its applications”, 22nd Signal Processing and Communications Applications Conference (SIU), 2014, pages: 2011 - 2014, DOI: 10.1109/SIU.2014.6830653.
    22. B. Tas, B. Ors, G. Karabulut Kurt, “Bina Yonetim Sistemleri icin Tahliye Modeli”, Gomulu Sistemler ve Uygulamalari Sempozyumu (GomSis), 04-05 Aralik 2014, Suleyman Demirel Kultur Merkezi, Istanbul Teknik Universitesi, Istanbul.
    23. C. Bagbaba, B. Ustaoglu, B. Ors, G. Isik, I. Erdem, “Leon3 Tabanli SoPC Tasarimi ve Uygulama Gerceklenmesi”, Gomulu Sistemler ve Uygulamalari Sempozyumu (GomSis), 04-05 Aralik 2014, Suleyman Demirel Kultur Merkezi, Istanbul Teknik Universitesi, Istanbul.
    24. B. Ustaoglu, B. Ors, “Mikroislemci Tabanli Bir Sisteme Hata Enjekte Etme Yontemi Gelistirilmesi ve Hata Tespit Mekanizmasinin Gerceklenmesi”, Elektrik - Elektronik Ve Bilgisayar Muhendisligi Sempozyumu, 27-30 Kasim 2014, Bursa.
    25. G. Baskir, B. Ors, “Implementation of a secure RFID protocol”, 21st Signal Processing and Communications Applications Conference (SIU), 2013, pages: 1 - 4, DOI: 10.1109/SIU.2013.6531442.
    26. O. E. Ozen, B. Ors, H.B. Yagci, “Design and implementation of a secure RFID system on FPGA”, 21st Signal Processing and Communications Applications Conference (SIU), 2013, pages: 1 - 4, DOI: 10.1109/SIU.2013.6531446.
    27. A. T. Erozan, S.G. Baskir, B. Ors, “Hardware/Software codesign for watermarking in DCT domain”, 21st Signal Processing and Communications Applications Conference (SIU), 2013, pages: 1 - 4, DOI: 10.1109/SIU.2013.6531294.
    28. M. Dilek, B. Ors, M. Kartal, “Reed-solomon decoder hardware implementation for DVB-S receiver”, 21st Signal Processing and Communications Applications Conference (SIU), 2013, Pages: 1 - 4, DOI: 10.1109/SIU.2013.6531372.
    29. O. Sahin, B. Ors, “Kriptoloji Uygulamalarina Ozel Bir Islemcinin Tasarlanarak FPGA Uzerinde Gerceklenmesi”, Gomulu Sistemler ve Uygulamalari Sempozyumu (GomSis), 29-30 Kasim 2012, Suleyman Demirel Kultur Merkezi, Istanbul Teknik Universitesi, Istanbul
    30. Tuncay, M. A. Ozkan, B. Ors, “GSM Ses Kanalindan Sayisal Veri ileten Bir Modemin Tasarimi ve Gerceklenmesi”, Gomulu Sistemler ve Uygulamalari Sempozyumu (GomSis), 29-30 Kasim 2012, Suleyman Demirel Kultur Merkezi, Istanbul Teknik Universitesi, Istanbul
    31. Alparslan, B. Ors, “Guvenli RFID Sistemleri Icin Bir Kimlik Dogrulama Protokolnun Gerceklenmesi”, Gomulu Sistemler ve Uygulamalari Sempozyumu (GomSis), 29-30 Kasim 2012, Suleyman Demirel Kultur Merkezi, Istanbul Teknik Universitesi, Istanbul
    32. B. Elci, B. Ors, V. Dalmisli, “Bir Steganografi Sisteminin FPGA Uzerinde Gerceklenmesi”, 3. Uluslararasi Katilimli Bilgi Guvenligi ve Kriptoloji Konferansi, 25-27 Aralik 2008, Ankara
    33. K. Bulut, B. Ors, I. Yavuz, “RFID Sistemlerinin Mikroislemci Uzerinde Guvenli Olacak Sekilde Gerceklenmesi”, 3. Uluslararasi Katilimli Bilgi Guvenligi ve Kriptoloji Konferansi, 25-27 Aralik 2008, Ankara
    34. V. Dalmisli, B. Ors, Gelismis Sifreleme Standardinin - AES - FPGA Uzerinde Gerceklenmesi, Elektrik - Elektronik Ve Bilgisayar Muhendisligi Sempozyumu, 26-30 Kasim 2008, Bursa
    35. V. Celik, B. Ors, “Guvenli Elektronik Posta Sistemi PGP nin FPGA Uzerinde Tasarimi Ve Gerceklenmesi”, Elektrik - Elektronik Ve Bilgisayar Muhendisligi Sempozyumu, 26-30 Kasim 2008, Bursa
    36. L. Ordu, B. Ors, “Yan Kanal Analizi Saldirilarina Genel Bakis”, Ulusal Elektronik Imza Sempozyumu Bildiriler Kitabi, sayfa: 242-249, 07-08 Aralik 2006
Siddika Berna Ors Yalcin Siddika.Ors@itu.edu.tr Last modified on 15/05/2024