Some useful Verilog links,

--> http://www.asic-world.com/verilog/veritut.html <---

http://www.cs.du.edu/~cag/courses/ENGR/ence3830/VHDL/

 http://www.see.ed.ac.uk/~gerard/Teach/Verilog/manual/

 http://www.eg.bucknell.edu/~cs320/1995-fall/verilog-manual.html

 http://www.sutherland-hdl.com/on-line_ref_guide/vlog_ref_top.html

 http://www-cad.eecs.berkeley.edu/~chinnery/synthesizableVerilog.html

http://ee.ucd.ie/~finbarr/verilog/

 http://athena.ee.nctu.edu.tw/courses/CAD/