Design 
  and Implementation of Second Order 
  Sigma-Delta Analog to Digital Converter 
  
  B.Sc. Thesis, 1996 
  Electronics and Communication Engineering Department 
  Electric Electronic Faculty 
  Istanbul Technical University 
  
  Supervisor: Prof Dr. Duran LEBLEBİCİ
  
  Content
  1. Functional Desciption of the A/D Converter
  2. Analysis of Quantization Noise
  3. Models of Quantizer
  4. Static Properties of A/D Converters
            4.1 Accuracy
            4.2 Absolute Accuracy
            4.3 Relative Accuracy
            4.4 Differential 
  Non-Linearity
            4.5 Integral Non-Linearity
            4.6 Errors Caused 
  by OPAMP Off-set
            4.7 Errors Caused 
  by Finite OPAMP Gain
  5. Dynamic Properties of A/D Converters
            5.1 Signal-to-Noise 
  Ratio
            5.2 Dynamic Range
            5.3 Effects of Finite 
  Conversion time
            5.4 Bit Error Rate
            5.5 Distortion
            5.6 PSRR
            5.7 Effects of OPAMP 
  Setling Time
  6. Power Comsumption Considerations
  7. Digital Filter Design and FIR Filters
  8. Different A/D Converter Topologies
            8.1 Integration 
  type A/D Converters
                      8.1.1 
  Single Slope A/D Converters
                      8.1.2 
  Dual Slope A/D Converters
                      8.1.3 
  Triple Slope A/D Converters
                      8.1.4 
  Charge Balancing A/D Converters
            8.2 Digital Ramp 
  Type A/D Converters
                      8.2.1 
  Tracking Type A/D Converters
                      8.2.2 
  Step Type A/D Converters
            8.3 SAR Type A/D 
  Converters
            8.4 Flash Type A/D 
  Converters
            8.5 Algorithmic 
  A/D Converters
  9. Delta Modulation Systems
  10. Over-sampling, Noise-Shaping Modulator
  11. Sigma-Delta Modulated A/D Converters
            11.1 Basics
            11.2 Sigma-Delta 
  Modulator Output
            11.3 Different Sigma-Delta 
  Modulator Structure
                      11.3.1 
  First Order Sigma Delta Modulator
                      11.3.2 
  Second Order Sigma Delta Modulator
                      11.3.3 
  Third Order Sigma Delta Modulator
                      11.3.4 
  Multi Stage Sigma Delta Modulator (MASH)
                      11.3.5 
  Nth Order Sigma Delta Modulator
            11.4 Dynamic Range 
  of The Modulator Input Signal
            11.5 Quantization 
  Noise in Sigma-Delta Modulators
            11.6 Decimation 
  for Sigma-Delta Modulation
            11.7 Second Order 
  Sigma Delta Modulator Structures in detail
  12. Implementation
  12.1 Design of the System
            12.2 Design of the 
  Comparator and the Integrator for the Second Order Modulator
                      12.2.1 
  Integrators
                      12.2.2 
  The Effects of the Gain Variations on the Modulator Performance
                      12.2.3 
  The Effects of Finite DC Gain on The Modulator Performance
                      12.2.4 
  The Effects of Finite Band width on The Modulator Performance
                      12.2.5 
  The Effects of Finite Slew-Rate on The Modulator Performance
                      12.2.6 
  The Effects of Comparator's Hysteresis on The Modulator Performance 
            12.3 Switched Capacitor 
  Circuits
            12.4 MOS Switches
            12.5 Design of the 
  Differential Amplifier
            12.6 Design of the 
  Comparator
            12.7 Design of the 
  Decimation Filter
  13. Conclusion
  
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