Running: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib unisims_ver -lib unimacro_ver -lib xilinxcorelib_ver -o C:/Users/EMRAH/Desktop/2016_sfs_uygulama_1/firfilter/test11_isim_beh.exe -prj C:/Users/EMRAH/Desktop/2016_sfs_uygulama_1/firfilter/test11_beh.prj work.test11 work.glbl 
ISim P.20131013 (signature 0x7708f090)
Number of CPUs detected in this system: 4
Turning on mult-threading, number of parallel sub-compilation jobs: 8 
Determining compilation order of HDL files
Analyzing Verilog file "C:/Users/EMRAH/Desktop/2016_sfs_uygulama_1/firfilter/../carpici.v" into library work
Analyzing Verilog file "C:/Users/EMRAH/Desktop/2016_sfs_uygulama_1/firfilter/../filtre.v" into library work
Analyzing Verilog file "C:/Users/EMRAH/Desktop/2016_sfs_uygulama_1/firfilter/../test11.v" into library work
Analyzing Verilog file "C:/Xilinx/14.7/ISE_DS/ISE//verilog/src/glbl.v" into library work
Starting static elaboration
Completed static elaboration
Compiling module carpici
Compiling module filtre
Compiling module test11
Compiling module glbl
Time Resolution for simulation is 1ps.
Waiting for 1 sub-compilation(s) to finish...
Compiled 4 Verilog Units
Built simulation executable C:/Users/EMRAH/Desktop/2016_sfs_uygulama_1/firfilter/test11_isim_beh.exe
Fuse Memory Usage: 27744 KB
Fuse CPU Usage: 374 ms
